Revision as of 18:41, 18 January 2014

Links to general information

• Digikey product training module about the DAC of the DDS (or in general)
• AD9951 product information on digikey contains the DAC - and other - training modules
• AN-912: Driving a Center-Tapped Transformer with a Balanced Current-Output DAC (refered to in the DAC training module).
• AN557: Using the AD9850 as a LO of a transceiver.
• AD9951 VFO design
• 150MHz VNA
• Antenna analyzer DDS + AD8302
• Digital representation of signals

AD9850 DDS Board

PHSNA

PHSNA is a SNA design closely related to the design I have in mind, as pointed out to me by Nick Kennedy.

• blog post about PHSNA

Selected excerpts from the mailing list

2) The RF amplifier that you added has limited harmonic distortion that will cause erroneous readings when the main signal is attenuated by the tested circuit but the harmonics will pass unattenuated. For example measure a narrowband Band Pass Filter frequency response and tune the SNA to a frequency band that includes the filter central frequency divided by 3. You will see there a spurious band pass curve (maybe 30 - 40 dB down) at third the filter frequency. I solved that by discarding the RF amplifier and using directly the DDS output, which has an excellent rejection of harmonics, at a cost of using lower power level.

3) The DDS module output power gets lower at higher frequencies. I have added a diode detector at the RF output and used the detected signal to stabilize the output power by comparing the detected signal to a reference voltage and feeding back the error signal through an integrator to the level pin in the AD9851. Now the accuracy is around +/1 dB across all the frequency range. Victor - 4Z4ME

link --- I SPICE modeled the filter on the DDS module and its (ideal) response rolls off at around 60 MHz. I'll post that result to the Files in a little while. We opted to add a filter that rolls off just above 30 MHz. One other possibility is to pick off the complementary output available on the DDS module (no LPF in line there) and go straight the filter on the shield board.

Actually I'm still puzzled a bit about the decrease in level. The 9850 data sheet (and an Analog Devices guru) cite the sinc function response. But calculating the sinc function as per the data sheet only yields about a one dB drop from 1 to 30 MHz. And the LPF on the DDS "should" be pretty flat well beyond 30 MHz. But Jerry saw about 10 db roll off over 1 - 30 MHz. Our curve fit compensation took care of that, but it's like treating the symptom instead of the cause. Inquiring minds....

link --- I'll find the time to take pictures of the SNA and post them here. The level control of the DDS chip is by controlling the Rset resistor connected to pin 12 of the AD985x. A circuit similar to the one that I use is presented here: http://www.vk5tm.com/homebrew/dds/dds.php However such a circuit will not be good for controlling a 10 dB RF level variation. link --- "building something without experimenting is just solder practice" link --- - I also have observed that the decrease in level with frequency is greater than expected. I think that it can be caused by the low Q of the surface mount inductors in the original filter.

- I also plan to put a better filter, and maybe use both outputs of the DDS with a balanced to unbalanced transformer.

- The AD9851 is almost identical to the AD9850, and doesn't have a level control feature. The amplitude is controlled with the current injected into pin 12 (Rset). That is what apparently Victor has done, but I would like to see his circuit. link ---

A couple of days ago I made a revision on the PCB to add a couple of pads that could be used if you wanted to pick off the DDS signal at J4 on the module (complementary output - without LPF) Even considered hacking the module and removing the filter components. But I really like the idea of using both outputs (after ditching the LPF) and a transformer. link --- The amplifier characteristics that will influence the harmonics are the 2nd and 3rd intermodulation intercept point and the mmics will not differ by much from the amplifier that you use for a given similar power consumption. Why are you so worried for the isolation of the output? The DDS chip output practically is a current source and is not sensitive to its load if its output amplitude does not reach a high voltage. The low pass filter is your only concern for load termination. If you would use only the DDS 7th order filter, its cutoff frequency should be around 50 MHz so even if it is affected by load mismatch at its output, it would not affect its frequency response at 30 MHz and lower. I think that I used only a 6dB attenuator at the RF output. As mentioned earlier, the level drop at high frequency might be caused by the low Q of the SMT inductors in the DDS board. You might try and replace them with small toroid inductors with the same inductance value. link --- We briefly thought about a MMIC but didd't go any further. In fact another 9850 DDS generator I have (KG6CYN design) uses a ERA1-SM1 MMIC. link --- Read until msg 93